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Hardware that translates virtual addresses to physical addresses
A memory management unit (MMU), sometimes called paged memory management unit (PMMU), is a computer hardware unit that examines all references to memory
Memory_management_unit
Configuration in computer memory
memory management unit (IOMMU) is a memory management unit (MMU) connecting a direct-memory-access–capable (DMA-capable) I/O bus to the main memory.
Input–output memory management unit
Input–output_memory_management_unit
Computer hardware component for security
of the central processing unit (CPU). MPU is a trimmed down version of memory management unit (MMU) providing only memory protection support. It is usually
Memory_protection_unit
Computer memory management methodology
Memory management (also dynamic memory management, dynamic storage allocation, or dynamic memory allocation) is a form of resource management applied
Memory_management
Device controlling access and addressing of memory
A memory controller, also known as memory chip controller (MCC) or a memory controller unit (MCU), is a digital circuit that manages the flow of data
Memory_controller
Computer memory management scheme
As such, paged memory functionality is usually hardwired into a CPU through its Memory Management Unit (MMU) or Memory Protection Unit (MPU), and separately
Memory_paging
Central processing unit by Sony Computer Entertainment and Toshiba
quantization for 2D graphics data. The memory management unit, RDRAM controller and DMA controller handle memory access within the system. Communications
Emotion_Engine
Central computer component that executes instructions
store the results of ALU operations, and a control unit that orchestrates the fetching (from memory), decoding and execution (of instructions) by directing
Central_processing_unit
32-bit microprocessor
oh-three-oh or oh-thirty). The 68030 is essentially a 68020 with a memory management unit (MMU) and instruction and data caches of 256 bytes each. It added
Motorola_68030
Error from a process accessing unmapped memory
computing, a page fault is an exception that the memory management unit (MMU) raises when a process accesses a memory page without proper preparations. Accessing
Page_fault
Function of computer operating systems
operating systems, memory management is the function responsible for managing the computer's primary memory. The memory management function keeps track
Memory management (operating systems)
Memory_management_(operating_systems)
Computer memory management technique
assignment of real memory to virtual memory. Address translation hardware in the CPU, often referred to as a memory management unit (MMU), automatically
Virtual_memory
Method of CPU communication
Memory-mapped I/O (MMIO) and port-mapped I/O (PMIO) are two complementary methods of performing input/output (I/O) between the central processing unit
Memory-mapped I/O and port-mapped I/O
Memory-mapped_I/O_and_port-mapped_I/O
Combinational digital circuit
In computing, an arithmetic logic unit (ALU) is a combinational digital circuit that performs arithmetic and bitwise operations on integer binary numbers
Arithmetic_logic_unit
Kernel-level anti-cheat developed by Riot Games
enabled the input–output memory management unit (IOMMU), a memory management unit which protects memory from malicious Direct Memory Access (DMA) cards, for
Riot_Vanguard
Processor architecture
Nios II's basic functionality by, for example, adding a predefined memory management unit (MMU), or defining custom instructions and custom peripherals. Similar
Nios_II
32-bit microprocessor by Motorola
coprocessors were defined: floating point units (MC68881 or MC68882 FPUs) and the paged memory management unit (MC68851 PMMU). Only one PMMU can be used
Motorola_68020
Additional storage that enables faster access to main storage
L2, split L1 I-cache and D-cache). A memory management unit (MMU) that fetches page table entries from main memory has a specialized cache, used for recording
Cache_(computing)
The MC68451 is a Motorola (now Freescale) Memory Management Unit (MMU), which was primarily used in conjunction with the Motorola MC68010 microprocessor
Motorola_68451
Dynamic memory management in the C programming language
C dynamic memory allocation refers to performing manual memory management for dynamic memory allocation in the C programming language via a group of functions
C_dynamic_memory_allocation
Security-related instruction code processor extension
Intel central processing units (CPUs). They allow user-level and operating system code to define protected private regions of memory, called enclaves. SGX
Software_Guard_Extensions
Personal computer by Apple Inc.
including its use of an ad hoc protected memory implementation rather than using a hardware memory management unit. In 1981, after Jobs was forced out of
Apple_Lisa
Digital circuit that produces sums from inputs
and other kinds of processors, adders are used in the arithmetic logic units (ALUs). They are also used in other parts of the processor, where they are
Adder_(electronics)
32-bit microprocessor
Floating-Point Unit (FPU). It thus included all of the functionality that previously required external chips, namely the FPU and Memory Management Unit (MMU),
Motorola_68040
Problems with central processing unit design
(Arithmetic Logic Unit). One solution to this resource hazard is to increase available resources, by having multiple ports into main memory and multiple ALUs
Hazard (computer architecture)
Hazard_(computer_architecture)
Storage of digital data readable by computers
memory management unit (MMU) is a small device between CPU and RAM recalculating the actual memory address. Memory management units allow for memory management;
Computer_data_storage
Ninth and last major release of the classic Mac OS (1999)
versions newer than 9.0.4, however, as it does not have support for a memory management unit. The PearPC PowerPC emulator does not support Mac OS 9. QEMU has
Mac_OS_9
I/O memory management unit for graphics
remapping table, or graphics translation table (GTT), is an I/O memory management unit (IOMMU) used by Accelerated Graphics Port (AGP) and PCI Express
Graphics address remapping table
Graphics_address_remapping_table
carry does not have to propagate through the full width of the addition unit. In effect, the addition in all RBRs is a constant-time operation. The addition
Redundant binary representation
Redundant_binary_representation
Computer memory that can be accessed by multiple processes
CPUs and GPUs, with shared memory), the memory management unit (MMU) of the CPU and the input–output memory management unit (IOMMU) of the GPU have to
Shared_memory
graphics data. Memory management unit (MMU), RDRAM controller and DMA controller: handle memory access within the system Cache memory: 16 KB instruction
PlayStation 2 technical specifications
PlayStation_2_technical_specifications
Core of a computer operating system
instructions for the central processing unit. The critical code of the kernel is usually loaded into a separate area of memory, which is protected from access
Kernel_(operating_system)
Hardware-assisted virtualization technology
generation hardware-assisted virtualization technology for the processor memory management unit (MMU). RVI was introduced in the third generation of Opteron processors
Second Level Address Translation
Second_Level_Address_Translation
Processor design concept
to access a user memory location. It can be called an address-translation cache. It is a part of the chip's memory-management unit (MMU). A TLB may reside
Translation_lookaside_buffer
Hardware cache of a central processing unit
processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located
CPU_cache
Reference to a specific memory location
translated to physical addresses by the computer's memory management unit (MMU) and the operating system's memory mapping mechanisms. Most modern computers are
Memory_address
Motorola 680x0 microprocessor, released in April 1994
lacked the floating-point unit (FPU) and the 68EC060 (embedded controller) which removed both the FPU and memory management unit (MMU). There is an LC (Low-Cost)
Motorola_68060
8-bit microprocessor
but a 2 MB physical address space. The HuC6280 uses a Memory Management Unit that splits the memory space into segments of 8 KB. Each logical 8 KB segment
Hudson_Soft_HuC6280
Type of digital adder
fixed overhead attached to each sequence of multiplications. The carry-save unit consists of n full adders, each of which computes a single sum and carry
Carry-save_adder
16-bit microprocessor
occurs in 16-bit words. The optional 48-pin Z8010 memory management unit (MMU) expands the memory map to 16 MB by translating the 23-bit address from
Zilog_Z8000
32-bit microprocessor by Intel
an on-chip memory management unit. This paging translation unit made it much easier to implement operating systems that used virtual memory. It also offered
I386
Machine instruction code that executes properly regardless of where in memory it resides
other memory in use by, for example, other shared libraries. PIC was also used on older computer systems that lacked a Memory Management Unit (MMU),
Position-independent_code
Fixed-length contiguous block of virtual memory
a page table. It is the smallest unit of data for memory management in an operating system that uses virtual memory. Similarly, a page frame is the smallest
Page_(computer_memory)
which was code-named Rosetta during development. Rosetta was a memory management unit (MMU), and it provided the ROMP with address translation facilities
IBM_ROMP
Computer hardware technology
as local and remote management applications may use those measurements to make trust decisions. It complements Intel Management Engine. This technology
Trusted_Execution_Technology
Microprocessor
MC88200 integrated circuit optionally add level 1 cache and a paged memory management unit. An MC88100 system typically used two of these devices for instructions
Motorola_88100
Register in a computer's CPU
the value in the memory location specified by the memory address register. It acts as a buffer, allowing the processor and memory units to act independently
Memory_buffer_register
Type of computer security breach
access to the system via direct memory access (DMA). This is possible despite use of an input/output memory management unit (IOMMU). This vulnerability was
Evil_maid_attack
Component that stores information
the computer memory can be transferred to storage; a common way of doing this is through a memory management technique called virtual memory. Modern computer
Computer_memory
8-bit microcontroller family
members offer up to 128 KiB of flash, and 8 KiB of RAM via a simple memory management unit (MMU) which allows bank-switching 16 KiB of the address space and
Motorola_S08
ARM Cortex-M based Microcontrollers by STMicroelectronics
an ARM Cortex-M core. Cortex-A application processors include a memory management unit (MMU), enabling them to run advanced operating systems such as Linux
STM32
Series of 32 bit CISC microprocessors
and data cache of 256 bytes each On-chip memory management unit (MMU) (68851) Low cost EC = No MMU Burst Memory Interface 68040: Instruction and data caches
Motorola_68000_series
US military standard for 16-bit computer
16-bit words of memory for the core standard. The standard defines an optional memory management unit that allows 220 16-bit words of memory using 512 page
MIL-STD-1750A
Cyberattack exploiting high-speed expansion ports
prevented from accessing any memory locations not explicitly authorized by the virtual memory controller (called memory management unit (MMU)). In addition to
DMA_attack
Data structure that maps virtual addresses with physical addresses
translation process by the memory management unit or by low-level system software or firmware. In operating systems that use virtual memory, every process is given
Page_table
Computer operating system
requires select 68k-based Macintosh models with an FPU and a paged memory management unit (PMMU). Its foundation is UNIX System V Release 2.2, with features
A/UX
Method of virtual memory management
process a memory management unit is used. The memory management unit maps logical memory to physical memory. Entries in the memory management unit include
Demand_paging
32-bit RISC-like computing architecture
one central processing unit containing both an integer unit and a floating point unit, and two cache and memory management units (CAMMUs), one responsible
Clipper_architecture
Symbolics operating system based on Lisp
collector uses only physical memory and uses the memory management unit to get information about changed pages in physical memory. The collector uses generations
Genera_(software)
32-bit microprocessor
used with the NS16082 memory management unit (MMU), which provided 24-bit virtual memory support for up to 16 MB physical memory. The NS16008 was a cut-down
NS32000
In computing, an operation whereby a process creates a copy of itself
family of system calls. The child borrows the memory management unit setup from the parent and memory pages are shared among the parent and child process
Fork_(system_call)
8-bit microprocessor
also took advantage of such memory management facilities. Most other computers of the time with more than 64 KB of memory addressing were limited to bank
Motorola_6809
Nintendo GameCube and Wii emulation software
problems which had been present since the emulator's earliest days. Memory management unit (MMU) improvements allowed many games to boot and work properly
Dolphin_(emulator)
4th generation of the mainline series of Raspberry Pi single-board computer
It is clocked at 500 MHz and includes a new Memory Management Unit, allowing it to access more memory despite being a 32-bit GPU. The GPU supports the
Raspberry_Pi_4
Real-time operating system
task and module isolation on SOCs with either a memory management unit (MMU) or memory protection unit (MPU), such as those based on ARMv7/8 Cortex-A/R/M
Nucleus_RTOS
Intel chipset
hardware support for virtualization by implementing an input/output memory management unit (IOMMU). The chipset also integrates a Low Pin Count (LPC) interface
Intel_X99
Home computer released in 1985
into the MMU's configuration register at memory address $FF00. Another feature of the memory management unit is to allow relocation of zero page and the
Commodore_128
Operating system based on the Linux kernel
such as: Routers – for example OpenWrt Microcontrollers with no memory management unit (MMU) – for example μClinux Internet of things – for example, targeted
Linux_distribution
Computing system
for the integration of central processing units and graphics processors on the same bus, with shared memory and tasks. The HSA is being developed by the
Heterogeneous System Architecture
Heterogeneous_System_Architecture
16-bit microprocessor
a commercial failure. The Z280 was fabricated in CMOS, added a memory management unit (MMU) to expand the addressing range to 16 MB, features for multitasking
Zilog_Z280
Type of interrupt signal sent between computer processors
requested include: Flush memory management unit caches, such as translation lookaside buffers, on other processors when memory mappings are changed by
Inter-processor_interrupt
8-bit microprocessor
and Intel processors. The on-chip memory management unit (MMU) has the capability of addressing up to 1 MB of memory. It is possible to configure the Z180
Zilog_Z180
Set of memory models of the x86 CPU
the 80386, with its paged memory management unit it is possible to protect individual memory pages against writing. Memory models are not limited to 16-bit
X86_memory_models
RISC instruction set architecture
pathway to an external instruction cache. The caches and associated memory management units (MMU) were initially external, a cache controller could be connected
Motorola_88000
Operating system microkernel
memory management unit (MMU). The MMU handled the instructions needed to implement a virtual memory system by keeping track of which pages of memory were
Mach_(kernel)
16-bit microprocessor
embedded microprocessor developed by Hitachi with an integrated memory management unit (MMU) and on-chip peripherals. It appeared in 1985. The Hitachi
Hitachi_HD64180
Topics referred to by the same term
refer to: Memory management unit, a computer component Manned Maneuvering Unit, a NASA spacesuit rocket pack Milli mass unit, an unofficial unit of mass
MMU
Electronic non-volatile computer storage device
executed there (leading to the common combination of NAND + RAM). A memory management unit (MMU) in the system is helpful, but this can also be accomplished
Flash_memory
MIPS microprocessor
112-cycle latency. Division and square-root uses the SRT algorithm. The memory management unit (MMU) uses a 48-entry translation lookaside buffer to translate
R4000
Computer
a proprietary Sun-2 Memory Management Unit (MMU), which enabled it to be the first Sun architecture to run a full virtual memory UNIX implementation,
Sun-2
Family of microprocessor cores with ARM microarchitecture
Unlike the other two families, the Cortex-A series supports a memory management unit (MMU) required by many modern operating systems. In 2025, Arm introduced
ARM_Cortex-A
The Motorola 68851 is an external Memory Management Unit (MMU) which is designed to provide paged memory support for the 68020 using that processor's coprocessor
Motorola_68851
Piece of software or hardware that creates and runs virtual machines
for virtualization requires memory protection (in the form of a memory management unit or at least a memory protection unit) and a distinction between
Hypervisor
CISC microprocessor
Renesas Electronics. The V60 family includes a floating-point unit (FPU) and memory management unit (MMU) and real-time operating system (RTOS) support for
NEC_V60
Linux distribution
previously maintained as a fork, that targets microcontrollers without a memory management unit (MMU). It was integrated into the mainline kernel as of 2.5.46 (2002)
ΜClinux
Family of Unix-like operating systems that use the Linux kernel
microprocessors, while the μClinux kernel fork may run on systems without a memory management unit. The kernel also runs on architectures that were only ever intended
Linux
Prototype 16-bit microprocessor
existing Z80, and differed primarily in having on-chip cache and a memory management unit (MMU) to provide a 16 MB address range. It also added a huge number
Zilog_Z800
Computer system with a dedicated function
potentially damage the data of another task (except in systems using a memory management unit) programs must be carefully designed and tested, and access to shared
Embedded_system
8-bit microprocessor
also supports direct continuous addressing of 16 MB of memory without a memory management unit, by extending most registers (HL, BC, DE, IX, IY, SP, and
Zilog_eZ80
Microprocessor core
pipeline depth (3-stage, 5-stage, or 8-stage), embedded peripherals, memory management unit, and bus-interfaces can be customized. The area-optimized version
MicroBlaze
Multiplayer Online Role-Playing Game MMS—Multimedia Message Service MMU—Memory Management Unit MMX—Multi-Media Extensions MNG—Multiple-image Network Graphics MoBo—Motherboard
List of computing and IT abbreviations
List_of_computing_and_IT_abbreviations
Memory expansion technology
Commodore management decided to not use the final version of the custom Memory Management Unit (MMU) which then limited the size of memory in spite of
Commodore_REU
RISC-based microprocessor design
contains an on-chip memory management unit and supports fault tolerant systems in conjunction with Intel's M82965 Bus Extension Unit as well. Both chips
Intel_i960
Custom chip from Apple Computer
emulation. The Mega II has the built-in equivalent of the IOU and memory management unit (MMU) chips, video and keyboard ROMs (with support for other display
Mega_II
controller. The memory card: accepts between 1 and 4 megabytes of Dynamic RAM in 1 megabyte increments, has an optional memory management unit implemented
Applix_1616
8-bit microprocessor
timers One CSIO (Clocked Serial Input/output) channel One MMU (Memory management Unit) that expands the addressing range to 20 bits Wait state generator
Z80182
Real-time operating system
processes ran within the 64KB address space of the CPU without a memory management unit. It was developed as a supporting operating system for the BASIC09
OS-9
Set of all computer components critical to its security
protection of the memory that hosts the TCB is achieved by adding in a specialized piece of hardware called the memory management unit (MMU), which is programmable
Trusted_computing_base
Software that hides details of hardware access
NT kernel-mode code to a variety of processors, with different memory management unit architectures, and a variety of systems with different I/O bus architectures;
Hardware_abstraction
Computer floating-point unit
The Motorola 68881 and Motorola 68882 are floating-point units (FPUs) used in some computer systems in conjunction with Motorola's 32-bit 68020 or 68030
Motorola_68881
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